When I was growing up, about 4 or 5 years old, I had an unorthodox favourite type of reading material: service manuals for my dad’s audio equipment. This got to the point that I kept asking my parents for more service manuals, and it became a running joke in our family for a bit. Since then, I’ve spent time repairing tech and laptops in particular as a way of earning money, hanging out at a flea market in the tech section, then spending tons of time at our hackerspace. Nowadays, I’m active in online hacker groups, and I have built series of projects closely interlinked with modern-day consumer-facing tech.

Twenty three years later, is it a wonder I have a soft spot in my heart for schematics? You might not realize this if you’re only upcoming in the hardware hacking scene, but device schematics, whichever way you get them, are a goldmine of information you can use to supercharge your projects, whether you’re hacking on the schematic-ed device itself or not. What’s funny is, not every company wants their schematics to be published, but it’s ultimately helpful for the company in question, anyway.

If you think it’s just about repair – it’s that, sure, but there’s also a number of other things you might’ve never imagined you can do. Still, repair is the most popular one.

Repair, Of Course

Asked to pay for a schematic? You can most likely find it elsewhere for free.
It’s an old chestnut that tech marvels of the past used to come bundled with schematics, and that’s no longer the case. Indeed, they are often top secret. For laptops and phones, one part of that is extensive NDAs that cover information on many a chip within them, including schematics. That said, somehow, this hasn’t stopped certain companies like Clevo, who has been seen putting their designs’ schematics right inside the service manual, for example, the P75xZM_ESM.pdf.

Still, schematics are a market; repair shops earn their keep from being able to fix devices, so a PDF is likely to leak one way or another, often it just takes time. For certain laptop manufacturers and series, this doesn’t happen, but most of all it seems to depend on popularity. In a way, schematics being leaked is a decent indicator that a product is popular enough to hit repair shops en masse, creating demand for underpaid workers to bring a loaded microSD card with them on a trip back home from the factory employing them.

I’m aware that companies sometimes can’t publish much, and, it’s still interesting how publishing schematics and other repair documents is not more popular with companies, despite everything it brings. During my call-in laptop repair days, travelling around with a tiny Asus netbook in my toolbox that used to be a makeup suitcase, I can remember one specific phrase I heard often: “yeah, we don’t like %BRAND%, we’ve had our %BRAND% device break and it couldn’t be fixed”.

Companies Who Publish Nevertheless

When it comes to publicly shared schematics, for instance, Framework laptops have adopted a “Raspberry Pi” approach – share schematics that concern external ports, where no NDAs could conceivably be involved, and even publish further specifications about these ports. This has created a vivid hacking and modding ecosystem around Framework, attracting a good amount of people, and this part in particular is something other companies could do as well. I’ve talked aplenty about the Framework ecosystem already, and I mention the schematic involvement there quite a bit, too!

It’s not just about connectors – there’s plenty of places in a laptop where failures are likely to occur, like power management. Intel might scoff at the CPU and Thunderbolt part pinouts being published, but schematics for these aren’t usually involved in a laptop repair anyway, what fails is usually power management, and chances are, just the schematic pages for that could be published without violating an NDA. Raspberry Pi’s schematics used to work in this way; sadly, RPF has given up on publishing Linux-powered Pi schematics due to being stuck in a perfectionism loop – the Pi 5 schematics are nowhere to be seen, and the USB-C-fixed Pi 4 schematics aren’t available either.

Pine64 is a strange case – their products are not open-source, in large part due to their operation’s scale landing them in a cloning-happy environment. Still, they publish a ton of the information that you might want. Pine64 publishes schematics for their products, and is forthcoming with things like – for instance, ever broke a barrel jack socket on your Pinecil? It’s a rare fault, but in case you somehow have, they stock replacement sockets. Of course, Pinecil schematics are available too, in full, same goes for PinePhone and most of their other products.

I was particularly active in the Pinecil community of the Pine64 discord, and thanks to schematics being accessible in a searchable way, we could help people fix their Pinecils on a community basis, across timezones, often quicker than the tech support could give them a response. In fact, because of the conversations happening in an official Pine64 community, Pine64 tech support could read the conversations in our channel, and avoid repeating many of the debugging steps with the Pinecil owner in question. It really helped that, everything they had to do over email, we could do over real-time chat! Schematics were a crucial part of that, from tracing what could it be that’d die from a reverse polarity what was shorting out the 3.3 V regulator, to the part numbers.

A good few failures were relatively common, and a few community members across different continents, including me, stocked up on some of the commonly involved parts and mailed them out to people in flat envelopes. Compared to the Pinecil sales numbers, the number of failures that we handled was pretty low, but we did help a good few people; generally, people were quite happy about fixing something they own, as opposed to getting a new iron and putting the broken one into a cupboard drawer!
here’s a trae you can cut to protect your old Pinecil from FUSB failure, and gain 24V support as a side effect
It wasn’t just replacing components – together, we narrowed down a particularly common fault that would kill Pinecils or at least make their USB-C PD power input inoperable, and figured out a fix that, in the end, involved simply cutting a trace. The gist is, a pin of a specific IC on the Pinecil was connected directly to the power input rail, this pin specifically was sensitive to overvoltage, killing the chip in a way that sometimes would even pull down the entire 3.3 V rail. What’s interesting, it didn’t have to be connected to that rail at all! The community designed a fix, people have applied it for both failure immunity and also being able to use 24 V bricks. Later on, Pine64 applied the fix to a new batch of the Pinecil hardware, which is now immune to this fault.

Before the ability to just cut the trace was figured out by [Thanos the tank engine] and others, I managed to design an addon board that’d down-regulate the voltage with a Zener diode, and even published the files for it. After all, you can design a whole lot if schematics are available!

Build All The Cool Stuff

Hackers have long used schematics to design things like addons – physical board attributes, you can redesign with calipers in hand, but schematics capture everything else. All those consoles put into tiny formfactors, made possible because of the motherboard being cut down? Schematics were likely involved in one way or another.

Friends of mine have done the same kind of schematic-inspired design, on a number of occasions – in particular, [Wificable] has designed an MXM reuse adapter and a good few MXM cards only thanks to available schematics, and her TinyRiser, an adapter that pulls extra PCIe from a particular lineup of Lenovo Tiny computers, was only possible because we could get find the relevant PDF in a Telegram group.
Got a technical question the manufacturer doesn’t expand on? A schematic is a reliable way to check.
It’s not just addons, it’s also finding information you can’t find otherwise. Wondering what your laptop’s USB-C port does, whether it supports DisplayPort, or charging input? The manufacturer’s website might not be helpful at all, but the schematics show it all instantly, on the page with the block diagram. I’ve seen a product being developed, an ExpressCard slot adapter housing an SSD, that researched laptop schematics to figure out 3.3 V current limits on the ExpressCard slot and how they were implemented in different laptops.

Tapping into the iPhone battery market to get a reliable source of slim batteries for your project? Use the schematics to find the battery connector pinout – and the connector part number. Remember the M.2 card with a 1:2 PCIe switch, that I’ve shown you the design process of? That one was only possible because of a laptop schematic we found featuring the ASM1182e chip. Schematics often contain part numbers, and these are super helpful – you could consult one of the connector bibles, or you could simply copy the part number for a connector out of a schematic PDF and get the exact part number necessary.

Remember that Sony Vaio P motherboard rebuild project I’ve started? I’ve just recently received the v1 PCBs of a motherboard I designed, now they’re waiting to be assembled, and I couldn’t have had done this without all the connector pinout information I found in the schematic. In particular, it might be that this motherboard replacement will be impossible to adapt to the second revision of these Vaios, since, as far as I’ve seen, that revision’s schematics haven’t leaked. Well, either way, expect an article about the new motherboard soon!

There’s way, way more you can learn from schematics as you go. One of my current projects requires learning a fair bit from the PinePhone schematic and specifically its LTE modem that boasts open firmware, as part of uncovering yet another series-worthy topic; naturally, you will hear about that one soon. Schematics keep a treasure trove of hacker-friendly information in them, and information deserves to be free.

[Usagi Electric] is breathtakingly close to having his Bendix G15 vacuum tube computer up and running. This week he is joined by a new friend, [Lloyd] who is restoring a G15 as well. [Lloyd] used to repair the Bendix Computers back in the 1970s, so he’s privy to lots of practical knowledge you can’t find in the manuals.

The goal this week was to apply DC power to the G15. The AC power spins the fans and makes the tubes start glowing. But DC makes the magic happen. That’s when the boot sequencers start running, sending data to the drum, testing various parts of the machine, and finally, loading software from the paper tape reader.

Since this was a computer from the 1950’s, powering up DC might work, or could let the magic smoke out. The only way to find out was to push the big green “Reset” button.

The first attempt was stymied by a blown fuse. The second attempt resulted in real live blinkenlights. The data and status lights on the Bendix lit up for the first time in decades. The only thing missing was the sound of the tape drive. A bit of digging proved that the problem wasn’t in the computer, but in the typewriter user console. The typewriter supplies -20 volts DC to the Bendix. Since that voltage wasn’t getting to the computer, the boot process halted.

Unfortunately, the typewriter has “somebody’s been here before” syndrome – in addition to age, there are a number of odd modifications. It’s going to take [Usagi] a bit of time to dig into it and figure out what’s wrong.

The good news is that the computer is using its massive spinning drum drive. [Usagi] was able to verify this with the test panel inside the machine. One button will write a pulse to the drum, and another will erase it. Manipulating these buttons, [Usagi] could see the results on an oscilloscope. This may sound simple – but just getting to this point means an incredibly complex chain of tube, relay, and mechanical logic has to work. Bravo [Dave] and [Lloyd]!

youtube.com/embed/f_kD3Dr5Im8?…

Un threat actor sostiene di aver divulgato dati sensibili di NATO – TIDE (Think-Tank for Information Decision and Execution Superiority).

NATO-TIDE (Think-Tank for Information Decision and Execution Superiority)

E’ una divisione specializzata della NATO (Organizzazione del Trattato dell’Atlantico del Nord), focalizzata sul miglioramento delle capacità decisionali e di esecuzione attraverso l’uso avanzato delle informazioni. Questa organizzazione ha lo scopo di ottimizzare la raccolta, l’analisi e l’uso dei dati per supportare operazioni militari e strategiche.

L’attore, identificato con il nome utente “natohub” su un forum online, ha pubblicato un annuncio il 7 luglio 2024, affermando di aver ottenuto e condiviso 643 file CSV contenenti dati degli utenti, gruppi di utenti, server fisici e virtuali, eventi e altro ancora. Le informazioni fornite includono dettagli come:

• Data: Luglio 2024
• Dimensione: 271MB
• Esempi di file: Users.csv

Dettagli della Presunta Violazione

L’annuncio è stato accompagnato da un logo di NATO e un breve messaggio rivolto alla comunità del forum, nel quale l’attore sottolineava la natura e l’importanza delle informazioni divulgate. I file coinvolti nella presunta violazione sembrano coprire una vasta gamma di dati che potrebbero avere un impatto significativo se autentici.

Veridicità e Riscontri

Al momento della stesura di questo articolo, non è stato possibile verificare con certezza l’autenticità della violazione. NATO non ha rilasciato alcun comunicato stampa ufficiale o dichiarazione pubblica riguardante l’incidente sul proprio sito web o tramite altri canali di comunicazione ufficiali. Pertanto, è essenziale trattare queste informazioni con cautela e considerarle come una ‘fonte di intelligence’ non verificata.

Implicazioni di Sicurezza

Se la violazione fosse confermata, le implicazioni per la sicurezza sarebbero significative. La divulgazione di dati sensibili come quelli degli utenti e dei server potrebbe esporre l’organizzazione a una serie di minacce, tra cui attacchi informatici mirati, phishing e altre forme di sfruttamento da parte di attori maligni. La natura dei dati divulgati suggerisce che le informazioni potrebbero essere utilizzate per scopi malevoli, compromettere la sicurezza operativa e danneggiare la reputazione di NATO.

Conclusioni

La presunta violazione dei dati NATO rappresenta un potenziale rischio significativo per la sicurezza delle informazioni e l’integrità operativa dell’organizzazione. Mentre si attende una verifica ufficiale, è fondamentale trattare queste informazioni con la dovuta cautela e prepararsi adeguatamente per mitigare eventuali rischi associati.Come nostra consuetudine, lasciamo sempre spazio ad una dichiarazione da parte dell’azienda qualora voglia darci degli aggiornamenti sulla vicenda. Saremo lieti di pubblicare tali informazioni con uno specifico articolo dando risalto alla questione.

L'articolo NATO-TIDE Sotto Attacco: Hacker Rivendica la Divulgazione di 643 File! proviene da il blog della sicurezza informatica.

The late 1990s saw the widespread introduction of solid-state storage based around NAND Flash. Ranging from memory cards for portable devices to storage for desktops and laptops, the data storage future was prophesied to rid us of the shackles of magnetic storage that had held us down until then. As solid-state drives (SSDs) took off in the consumer market, there were those who confidently knew that before long everyone would be using SSDs and hard-disk drives (HDDs) would be relegated to the dust bin of history as the price per gigabyte and general performance of SSDs would just be too competitive.

Fast-forward a number of years, and we are now in a timeline where people are modifying SSDs to have less storage space, just so that their performance and lifespan are less terrible. The reason for this is that by now NAND Flash has hit a number of limits that prevent it from further scaling density-wise, mostly in terms of its feature size. Workarounds include stacking more layers on top of each other (3D NAND) and increasing the number of voltage levels – and thus bits – within an individual cell. Although this has boosted the storage capacity, the transition from single-level cell (SLC) to multi-level (MLC) and today’s TLC and QLC NAND Flash have come at severe penalties, mostly in the form of limited write cycles and much reduced transfer speeds.

So how did we get here, and is there life beyond QLC NAND Flash?

Floating Gates

Basic model of a floating-gate transistor.
At the core of NAND Flash lies the concept of floating gates, as first pioneered in the 1960s with the floating-gate MOSFET (FGMOS). As an FGMOS allows for the retention of a charge in the floating gate, it enabled the development of non-volatile semiconductor storage technologies like EPROM, EEPROM and flash memory. With EPROM each cell consists out of a single FET with the floating and control gates. By inducing hot carrier injection (HCI) with a programming voltage on the control gate, electrons are injected into the floating gate, which thus effectively turns the FET on. This allows then for the state of the transistor to be read out and interpreted as the stored bit value.

Naturally, just being able to program an EPROM once and then needing to erase the values by exposing the entire die to UV radiation (to induce ionization within the silicon oxide which discharges the FET) is a bit of a bother, even if it allowed the chip to be rewritten thousands of times. In order to make EPROMs in-circuit rewritable, EEPROMs change the basic FET-only structure with two additional transistors. Originally EEPROMs used the same HCI principle for erasing a cell, but later they would switch to using Fowler-Nordheim tunneling (FNT, the wave-mechanical form of field electron emission) for both erasing and writing a cell, which removes the damaging impact of hot carrier degradation (HCD). HCD and the application of FNT are both a major source of the physical damage that ultimately makes a cell ‘leaky’ and rendering it useless.

Combined with charge trap flash (CTF) that replaces the original polycrystalline silicon floating gate with a more durable and capable silicon nitride material, modern EEPROMs can support around a million read/write cycles before they wear out.

Flash memory is a further evolution of the EEPROM, with the main distinctions being a focus on speed and high storage density, as well as the use of HCI for writes in NOR Flash, due to the speed benefits this provides. The difference between NOR and NAND Flash comes from the way in which the cells are connected, with NOR Flash called that way because it resembles a NOR gate in its behavior:
NOR flash memory wiring and structure on silicon (Credit: Cyferz, Wikimedia)
To write a NOR Flash cell (set it to logical ‘0’), an elevated voltage is applied to the control gate, inducing HCI. To erase a cell (reset to logical ‘1’), a large voltage of opposite polarity is applied to the control gate and the source terminal, which draws electrons out of the floating gate due to FNT.

Reading a cell is then performed by pulling the target word line high. Since all of the storage FETs are connected to both ground and the bit line, this will pull the bit line low if the floating gate is active, creating a logical ‘1’ and vice versa. NOR Flash is set up to allow for bit-wise erasing and writing, although modern NOR Flash is moving to a model in which erasing is done in blocks, much like with NAND Flash:
NAND flash memory wiring and structure on silicon (Credit: Cyferz, Wikimedia)
The reason why NAND Flash is called this way is readily apparent from the way the cells are connected, with a number of cells connected in series (a string) between the bit line and ground. NAND Flash uses FNT for both writing and erasing cells, which due to its layout always has to be written (set to ‘0’) and read in pages (a collection of strings), while erasing is performed on a block level (a collection of pages).

Unlike NOR Flash and (E)EPROM, the reading out of a value is significantly more complicated than toggling a control gate and checking the level of the bit line. Instead the control gate on a target cell has to be activated, while putting a much higher (>6V) voltage on the control gate of unwanted cells in a string (which turns them on no matter what). Depending on the charge inside the floating gate, the bit line voltage will reach a certain level, which can then be interpreted as a certain bit value. This is also how NAND Flash can store multiple bits per cell, by relying on precise measurements of the charge level of the floating gate.

All of this means that while NOR Flash supports random (byte-level) access and erase and thus eXecute in Place (XiP, allows for running applications directly off ROM), NAND Flash is much faster with (block-wise) writing and erasing, which together with the higher densities possible has led to NAND Flash becoming the favorite for desktop and mobile data storage applications.

Scaling Pains

With the demand for an increasing number of bytes-per-square-millimeter for Flash storage ever present, manufacturers have done their utmost to shrink the transistors and other structures that make up a NAND Flash die down. This has led to issues such as reduced data retention due to electron leakage and increased wear due to thinner structures. The quick-and-easy way to bump up total storage size by storing more bits per cell has not only exacerbated these issues, but also introduced significant complexity.

The increased wear can be easily observed when looking at the endurance rating (program/erase (P/E) cycles per block) for NAND Flash, with SLC NAND Flash hitting up to 100,000 P/E cycles, MLC below 10,000, TLC around a thousand and QLC dropping down to hundreds of P/E cycles. Meanwhile the smaller feature sizes have made NAND Flash more susceptible to electron leakage from electron mobility, such from high environmental temperatures. Data retention also decreases with wear, making data loss increasingly more likely with high-density, multiple bits per cell NAND Flash.

Because of the complexity of QLC NAND Flash with four bits (and thus 16 voltage levels) per cell, the write and read speeds have plummeted compared to TLC and especially SLC. This is why QLC (and TLC) SSDs use a pseudo-SLC (pSLC) cache, which allocates part of the SSD’s Flash to be only used only with the much faster SLC access pattern. In the earlier referenced tutorial by Gabriel Ferraz this is painfully illustrated by writing beyond the size of the pSLC cache of the target SSD (a Crucial BX500):
(Credit: Gabriel Ferraz)
Although the writes to the target SSD are initially nearly 500 MB/s, the moment the ~45 GB pSLC cache fills up, the write speeds are reduced to the write speeds of the underlying Micron 3D QLC NAND, which are around 50 MB/s. Effectively QLC NAND Flash is no faster than a mechanical HDD, and with worse data retention and endurance characteristics. Clearly this is the point where the prophesied solid state storage future comes crumbling down as even relatively cheap NAND Flash still hasn’t caught up to the price/performance of HDDs.

(Credit: Gabriel Ferraz)
The modification performed by Gabriel Ferraz on the BX500 SSD involves reprogramming its Silicon Motion SM2259XT2 NAND Flash controller using the MPTools software, which is not provided to consumers but has been leaked onto the internet. While not as simple as toggling on a ‘use whole SSD as pSLC’ option, this is ultimately what it comes down to after flashing modified firmware to the drive.

With the BX500 SSD now running in pSLC mode, it knocks the storage capacity down from 500 GB to 120 GB, but the P/E rating goes up from a rated 900 cycles in QLC mode to 60,000 cycles in pSLC mode, or well over 3,000%. The write performance is a sustained 496 MB/s with none of the spikes seen in QLC mode, leading to about double the score in the PCMark 10 Full System Drive test.

With all of this in mind, it’s not easy to see a path forward for NAND Flash which will not make these existing issues even worse. Perhaps Intel and Micron will come out of left field before long with a new take on the 3D XPoint phase-change memory, or perhaps we’ll just keep muddling on for the foreseeable future with ever worse SSDs and seemingly immortal HDDs.

Clearly one should never believe prophets, especially not those for shiny futuristic technologies.

Featured image: “OCZ Agility 3 PCB” by [Ordercrazy]

Recentemente, una massiccia esposizione di dati ha colpito X (twitter), con quasi 200 milioni di record utente. Questa violazione potrebbe rappresentare una delle più grandi esposizioni di dati utente degli ultimi tempi e ha messo a rischio la sicurezza e la privacy di milioni di utenti. In questo articolo analizziamo i dettagli della violazione, le sue implicazioni e i rischi potenziali per gli utenti coinvolti.

Dimensioni e Fonte della Fuga di Dati

Il database trapelato contiene un’enorme quantità di dati, per un totale di 9,4 GB. La fonte della violazione è un database di Twitter o una sua copia, che è stata pubblicata su un noto forum di hacking dedicato alla fuga e alla violazione di dati.

Il titolo del thread, “9.4GB Twitter Leaked Database Last One – The Exposure Of Over 200 Million Records Containing Email Addresses, Names, And Twitter Account Details,” evidenzia la gravità e la portata di questa fuga di dati.

Dettagli della Fuga di Dati

L’attore malevolo responsabile del rilascio del database, noto con il nome “michupa,” ha creato recentemente il proprio account sul forum (il 7 luglio 2024).

Nel thread, “michupa” fornisce un riassunto dell’incidente, specificando che la violazione è la più recente e ha coinvolto oltre 200 milioni di record. Il campione di record trapelato contiene informazioni come indirizzi email, nomi, nomi utente (screen names), numero di follower e la data di creazione dell’account.

Tipologie di Dati Esposti

I dati esposti includono:

• Indirizzi email
• Nomi
• Dettagli degli account X (screen names, numero di follower, data di creazione degli account)

Gli indirizzi email associati agli account Twitter possono essere utilizzati per attività di phishing, spamming o altre attività malevole. I nomi completi degli utenti di Twitter e le informazioni sugli account, inclusi i nomi utente e altre informazioni del profilo, possono essere utilizzati per identificare gli individui e potenzialmente collegarli ad altri profili online.

Implicazioni e Rischi per gli Utenti

L’esposizione dei dati mette gli utenti a rischio di vari attacchi, tra cui phishing, furto di identità e schemi di ingegneria sociale. Con la vasta quantità di informazioni personali disponibili, attori malintenzionati possono sfruttare questi dati per compromettere ulteriormente account e sistemi collegati agli indirizzi email interessati.

Veridicità della Violazione

Al momento, non possiamo confermare con precisione la veridicità della violazione, poiché l’organizzazione non ha ancora rilasciato alcun comunicato stampa ufficiale sul proprio sito web riguardo l’incidente. Pertanto, questo articolo dovrebbe essere considerato come una ‘fonte di intelligence’ e non come un rapporto confermato.

Conclusioni e Raccomandazioni

La fuga di dati di Twitter rappresenta un grave rischio per la privacy e la sicurezza degli utenti coinvolti. È essenziale che gli utenti interessati adottino misure di sicurezza adeguate, come il cambio delle password, l’attivazione dell’autenticazione a due fattori e una maggiore attenzione a possibili tentativi di phishing. Le piattaforme social e le autorità competenti devono collaborare per mitigare i danni e prevenire future violazioni di questo tipo.

Come nostra consuetudine, lasciamo sempre spazio ad una dichiarazione da parte dell’azienda qualora voglia darci degli aggiornamenti sulla vicenda. Saremo lieti di pubblicare tali informazioni con uno specifico articolo dando risalto alla questione.

RHC monitorerà l’evoluzione della vicenda in modo da pubblicare ulteriori news sul blog, qualora ci fossero novità sostanziali. Qualora ci siano persone informate sui fatti che volessero fornire informazioni in modo anonimo possono utilizzare la mail crittografata del whistleblower.

L'articolo Esposti 200 Milioni di Account X (Twitter) nelle underground proviene da il blog della sicurezza informatica.

@Notizie dall'Italia e dal mondo

A Rio de Janeiro si è recentemente svolto il corso “I Caschi Blu della Cultura. Il Patrimonio Culturale in caso di catastrofe: rischi e interventi di sicurezza””. La giornata conclusiva si è tenuta il 2 luglio al Paço Imperial (Palazzo Imperial).

I "caschi blu della cultura" sono una idea italiana, sviluppatasi sin dal 2016 nell’ambito della campagna #Unite4Heritage. Il governo italiano e l’Unesco siglarono un memorandum d’intesa per la creazione di una task force di sessanta unità, composta da carabinieri, storici dell’arte, studiosi e restauratori, pronti a intervenire per salvaguardare il patrimonio culturale in zone di crisi. Con Decreto firmato il 31 marzo 2022 dal Ministro della Cultura pro–tempore Franceschini fu perfezionata la Task Force, formalmente denominata “Caschi Blu della Cultura”, unità operativa concepita per intervenire in aree colpite da emergenze, quali calamità o crisi prodotte dall’uomo, in una cornice di sicurezza, al fine di: – salvaguardare i siti archeologici, i luoghi della cultura ed i beni culturali; – contrastare il traffico internazionale di beni culturali illecitamente sottratti; – supportare l’Autorità dei Paesi esteri richiedenti, nella predisposizione di misure atte a limitare i rischi che situazioni di crisi o emergenziali potrebbero arrecare al patrimonio culturale di quella Nazione. L' #Armadeicarabinieri – con personale tratto dal Comando Tutela Patrimonio Culturale (#TPC) assegnato al Ministero della Cultura – hanno la gestione operativa–logistica delle missioni.

Tornando al corso in Brasile, questo è stato realizzato dall’Organizzazione Internazionale Italo-Latino Americana (#IILA), con il finanziamento della Direzione Generale per la Cooperazione allo Sviluppo del Ministero degli Affari Esteri e della Cooperazione Internazionale (#MAECI), in collaborazione con il Ministero della Cultura italiano (#MIC), il Comando Carabinieri Tutela Patrimonio Culturale e, da parte brasiliana, con il Ministério das Relações Exteriores, Ministerio da Cultura, Centro Lucio Costa, IPHAN – Instituto do Patrimônio Histórico e Artístico Nacional, SBM – Sistema Brasiliero de Museus, IBRAM – Instituto Brasileiro de Museus, Instituto Guimarães Rosa, #PoliciaFederal e #INTERPOL Brasil. Hanno partecipato 55 funzionari pubblici latinoamericani, provenienti da forze di polizia, forze armate, protezione civile e vigile del fuoco, Ministero della Cultura oltre a restauratori e conservatori di beni culturali, per formare di una task force italo-latinoamericana per la protezione del patrimonio culturale

Tra gli altri intervenuti alla giornata finale il Generale D. Francesco Gargaro, Comandante Carabinieri Tutela Patrimonio Culturale; Paolo Iannelli, Rappresentante del MIC – Caschi Blu della Cultura; Marcos Moreira Nizio, Capo del Settore Protezione del Patrimonio storico e culturale della Polizia Federale brasiliana.

Il Generale Gargaro (foto sopra) ha dichiarato nella circostanza:“Il corso che oggi si conclude è stato concepito per dotarvi degli strumenti necessari per affrontare queste sfide. Attraverso questo confronto tra diverse esperienze si sono volute trasmettere competenze tecniche e operative che permetteranno di intervenire sempre più efficacemente in situazioni di emergenza. Avete imparato l’importanza dell’identificazione e catalogazione dei beni culturali anche in situazioni emergenziali, della collaborare con le comunità locali e con le diverse istituzioni in contesti complessi. In un’epoca in cui i conflitti, crisi e catastrofi naturali minacciano di cancellare la memoria storica e culturale dei popoli, l’importanza del nostro lavoro non può essere sottovalutata. La distruzione di beni culturali non è solo una perdita per le comunità direttamente coinvolte, ma per tutta l’umanità.
È la cancellazione della nostra storia condivisa, delle nostre identità e dei valori che ci uniscono come esseri umani”.

La missione addestrativa, tenuta dal 24 giugno al 2 luglio 2024 da esperti italiani del Ministero della Cultura e del Comando Carabinieri Tutela del Patrimonio Culturale, ha voluto trasmettere ai paesi partecipanti quali Brasile, Cile, Colombia e Paraguay il modello italiano di tutela del patrimonio culturale attraverso sessioni teoriche ed esercitazioni pratiche, tra cui la simulazione di una inondazione e un focus rivolto alla sicurezza di beni archivistici e librari in ragione delle esigenze di tutela del territorio ospitante.

Durante la consegna dei diplomi, la Segretaria Generale dell'Organizzazione internazionale italo-latino americana Cavallari, nel ringraziare tutte le istituzioni partners che hanno reso possibile il successo del corso, ha sottolineato che l’obiettivo principale dell’IILA è proprio quello di stimolare la reciproca conoscenza e integrazione fra i paesi membri. Il programma addestrativo di quest’anno, come quello realizzato nel giugno 2023 a Città del Messico con la partecipazione di esperti di Bolivia, Costa Rica, Ecuador, Guatemala, Messico, Perù e Repubblica Dominicana, ha conseguito l’obiettivo di promuovere la condivisione di esperienze e buone pratiche per la possibile creazione di Caschi Blu della Cultura in Brasile, Colombia, Cile e Paraguay.

Importante infine sottolineare come la partecipazione dei carabinieri esalta il loro ruolo nella difesa a livello internazionale del patrimonio culturale italiano e mondiale: ruolo che l’Arma svolge nella protezione dei beni culturali da più di cinque decenni .

@Notizie dall'Italia e dal mondo

Anche la #PoliziadiStato italiana (a mezzo del Servizio Polizia Postale e per la Sicurezza Cibernetica) ha partecipato al Referral Action Day di #Europol mirato ad identificare e combattere i contenuti antisemiti online (a sua volta mediante l'Unità europea per le segnalazioni su Internet denominata EU IRU - Internet Referral Unit - che rileva e indaga sui contenuti dannosi presenti su Internet e nei social media).

Si è trattato di una operazione coordinata, guidata dalle autorità di Svizzera e Regno Unito, svoltasi il 27 giugno scorso, che ha coinvolto le forze dell'ordine di 18 paesi (leggi nora a conclusione), che hanno lavorato in tandem come cennato all'Unità EU IRU di Europol e i principali fornitori di servizi online.

Il Referral Action Day ha preso di mira un'ampia gamma di contenuti antisemiti, tra cui incitamento all'odio, negazione dell'Olocausto e glorificazione della violenza contro la comunità ebraica. L'obiettivo principale era rimuovere i contenuti illegali e garantire che le piattaforme online aderissero alle normative europee in materia di incitamento all'odio e discriminazione.

In totale, sono stati identificati e segnalati circa 2.000 contenuti antisemiti ai fornitori di servizi online per la rimozione.

Il focus del Referral Action Day nasce dall'aumento di un antisemitismo diffuso, giustificato e coltivato nelle sfere jihadiste e nei gruppi estremisti di destra e di sinistra online. Questo contenuto antisemita viene diffuso anche da individui non affiliati su varie piattaforme online. A quanto è risultato la ondata di discorsi d'odio è stata innescata dall'attacco del 7 ottobre dell'organizzazione terroristica Hamas contro Israele e dalla successiva risposta militare israeliana.

Le National Internet Referral Unit e le unità di polizia specializzate dei seguenti paesi hanno preso parte a questo Referral Action Day: Albania, Austria, Bosnia-Erzegovina, Danimarca, Francia, Germania, Ungheria, Irlanda,Italia, Lituania, Malta, Portogallo, Romania, Spagna, Svezia, Svizzera, Ucraina e Regno Unito.
#EUIRU